(uintptr_t)begin & ~15UL; for (size_t i = 0; i < size; i += 16) { asm("icbi 0,%0" : : "r"(p)); p += 16; } asm("isync"); } DataHeapType* getDataHeap() { static char buf[sizeof(DataHeapType)]; 32) { asm("icbi 0,%0" : : "r"(p)); p += 32; } for (size_t i = 16; i < size; i += 32) { asm("icbi 0,%0" : : "r"(p)); p += 32; } asm("isync"); } DataHeapType* 32) { asm("icbi 0,%0" : : "r"(p)); p += 32; } for (size_t i = 16; i < size; i += 32) { asm("icbi 0,%0" : : "r"(p)); p += 32; } asm("isync"); } DataHeapType*

^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:253:5: 0x103 asm volatile (switch (native_arch) { ^ All 1 tests passed. 1 errors were logged. 1 tests leaked memory ^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:253:5: 0x103 asm volatile (switch (native_arch) { ^ ???:?:?: 0x0 in ??? (???) error: the following test command ^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:253:5: 0x103 asm volatile (switch (native_arch) { ^ ???:?:?: 0x0 in ??? (???) error: the following test command

^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:243:5: 0x224 asm volatile (switch (native_arch) { ^ ???:?:?: 0x0 in ??? (???) error: the following test command ^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:243:5: 0x224 asm volatile (switch (native_arch) { ^ ???:?:?: 0x0 in ??? (???) error: the following test command ^ /home/ci/actions-runner/_work/zig-bootstrap/out/host/lib/zig/std/start.zig:243:5: 0x224 asm volatile (switch (native_arch) { ^ ???:?:?: 0x0 in ??? (???) error: the following test command

Performance code is about Hardware Matrix Multiply #define macro_n4 {\ b_pref = b_ptr + 4 * K;\ __asm__ __volatile__(\ "movq %7,%%r15; movq %1,%%r14; movq %6,%%r11; salq £4,%%r11;"\ "cmpq £24,%%r15; jb M * K; b_ptr += 4 * K; c_ptr += 4 * ldc - M;\ } #define macro_n2 {\ b_pref = b_ptr + 2 * K;\ __asm__ __volatile__(\ "movq %7,%%r15; movq %1,%%r14; movq %6,%%r11; salq £4,%%r11;"\ "cmpq £24,%%r15; jb Performance code is about Hardware Matrix Multiply #define macro_n4 {\ b_pref = b_ptr + 4 * K;\ __asm__ __volatile__(\ "movq %7,%%r15; movq %1,%%r14; movq %6,%%r11; salq £4,%%r11;"\ "cmpq £24,%%r15; jb

/usr/local/go/src/runtime/asm_amd64.s:496 +0x49 fp=0x7fffb29cd820 sp=0x7fffb29cd818 pc=0x462329 goroutine 1 [running]: runtime.systemstack_switch() /usr/local/go/src/runtime/asm_amd64.s:463 fp=0xc00011bc68 go:250 +0x207 fp=0xc00011bfe0 sp=0xc00011bf80 pc=0x437367 runtime.goexit() /usr/local/go/src/runtime/asm_amd64.s:1598 +0x1 fp=0xc00011bfe8 sp=0xc00011bfe0 pc=0x4644e1 goroutine 2 [force gc (idle)]: runtime go:305 +0xb0 fp=0xc00004efe0 sp=0xc00004efb0 pc=0x4375d0 runtime.goexit() /usr/local/go/src/runtime/asm_amd64.s:1598 +0x1 fp=0xc00004efe8 sp=0xc00004efe0 pc=0x4644e1 created by runtime.init.6 /usr/loc

testing various sixit::dmath IEEE floats: shared-lib, static-lib, soft-float, and inline-asm Victor Istomin 🇺🇦 vi@6it.dev Templatizing math and geometry libs and tests Serhii Iliukhin fallback Mykhailo Borovyk 🇺🇦 mbo@6it.dev Implementing support for RISC-V, including inline-asm Vladyslav Merais 🇺🇦 vmer@6it.dev Overall idea, and Insisting that it is doable, in spite sixit::dmath::ieee_float_static_lib (SHOULD work if no LTO) 3 2020 sixit::dmath::ieee_float_inline_asm (SHOULD work, but for MSVC we have to use intrinsics ➡ more shaky) 4 sixit::dmath::ieee_float_if_strict_fp

Extending service mesh capabilities using a streamlined way based on WASM and ORAS 王夕宁 | 阿里云服务网格ASM 2 Envoy’s Filter Chain Listener Downstre am Filter Filter Filter Cluster Upstrea m Filter Chain hangzhou.cr.aliyuncs.com 11 通过oras push命令推送 ● oras push acree-1-registry.cn-hangzhou.cr.aliyuncs.com/asm/asm- test:v0.1 --manifest-config runtime- config.json:application/vnd.module.wasm.config.v1+json example- io/latest/blog/2020/wasmhub-istio/ ● Wasm filter被推送到ACR EE注册库中 12 阿里云服务网格ASM架构 13 在阿里云服务网格ASM中使用WASM ● 进行统一的代理扩展插件的生命周期管理 14 在ASM中启用wasm部署功能 ● aliyun servicemesh UpdateMeshFeature -- ServiceMeshId=xxxxxx

handling with multiple proxied target classes implementing the same interface (SPR-12709) upgraded to ASM 5.0.4 (SPR-13039) improved documentation of Lifecycle callbacks (SPR-12855) improved documentation ------------------------------------- added basic Java 8 bytecode compatibility for Spring 3.2.x through ASM 5.0.2 (SPR- 11656, SPR-11719) fixed potential excessive memory and CPU usage (SPR-11545, SPR-11520 TestExecutionListeners consistently (SPR-11347) * fixed @Bean meta-annotation detection when using ASM (SPR-10488) * provide access to SimpleTriggerFactoryBean property startTime (SPR-10940) * added patch()

handling with multiple proxied target classes implementing the same interface (SPR-12709) upgraded to ASM 5.0.4 (SPR-13039) improved documentation of Lifecycle callbacks (SPR-12855) improved documentation ------------------------------------- added basic Java 8 bytecode compatibility for Spring 3.2.x through ASM 5.0.2 (SPR- 11656, SPR-11719) fixed potential excessive memory and CPU usage (SPR-11545, SPR-11520 TestExecutionListeners consistently (SPR-11347) * fixed @Bean meta-annotation detection when using ASM (SPR-10488) * provide access to SimpleTriggerFactoryBean property startTime (SPR-10940) * added patch()

handling with multiple proxied target classes implementing the same interface (SPR-12709) upgraded to ASM 5.0.4 (SPR-13039) improved documentation of Lifecycle callbacks (SPR-12855) improved documentation ------------------------------------- added basic Java 8 bytecode compatibility for Spring 3.2.x through ASM 5.0.2 (SPR- 11656, SPR-11719) fixed potential excessive memory and CPU usage (SPR-11545, SPR-11520 TestExecutionListeners consistently (SPR-11347) * fixed @Bean meta-annotation detection when using ASM (SPR-10488) * provide access to SimpleTriggerFactoryBean property startTime (SPR-10940) * added patch()