Autoregressive sampling net running at faster than real-time - Compute split between GRU units and FC layers - 24kHz sampling frequency requires 40us sampling net runtime - First PyTorch model used

with FPGA ˃ TVM pipeline needed. CPU/FPGA partitions ideally run in parallel >> 13 Post-Process (fc/softmax/nms) FPGA Acceleration Pre-Process (resize)© Copyright 2018 Xilinx FPGA Pipeline report